Custom and reconfigurable digital computing systems

Journals



Nuno Paulino, João Canas Ferreira, João Cardoso, Architecture for Transparent Binary Acceleration of Loops with Memory Accesses, Reconfigurable Computing: Architectures, Tools and Applications, P. Brisk, J. G. Figueiredo Coutinho, and P. C. Diniz, Eds. Berlin, Heidelberg: Springer Berlin Heid, vol.7806, pp.122-133, 2013.

João Bispo, Nuno Miguel Paulino, João Cardoso, João Canas Ferreira,
Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems, IEEE Transactions on Industrial Informatics, DOI:10.1109/TII.2012.2235844, vol.9, no.3, Agosto, 2013.

João Bispo, Nuno Paulino, João M. P. Cardoso, João Canas Ferreira, Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units, International Journal of Reconfigurable Computing, vol. 2013, Article ID 340316, 20 pages, Fevereiro, 2013.

João Canas Ferreira, Miguel Silva, Run-time generation of partial FPGA configurations for subword operations, Microprocessors and Microsystems, vol.36, no.5, pp.365-374, 2012.

Miguel L. Silva, João Canas Ferreira, Run-time Generation of Partial FPGA Configurations, Journal of Systems Architecture, vol.58, pp.24-37, Janeiro, 2012.

M. L. Silva, João Canas Ferreira,
Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems, IET Computers & Digital Techniques, vol.1, no.5, pp.461-471, Setembro, 2007.

Miguel L. Silva, João Canas Ferreira,
Support for Partial Run-Time Reconfiguration of Platform FPGAs, Journal of Systems Architecture, vol.52, no.12, pp.709-726, Dezembro, 2006.

Conferences



Filipe Sousa, Francis Anghinolfi, João Canas Ferreira, Register Transfer Level Workflow for Application and Evaluation of Soft Error Mitigation Techniques, Euromicro dsd/seaa 2013 - Euromicro Conference on Digital System Design (DSD), Santander, Spain, Setembro, 2013.

Hugo Marques, João Canas Ferreira, A Remote Demonstrator for Dynamic FPGA Reconfiguration, REC 2013 - X Jornadas sobre Sistemas Reconfiguráveis, Coimbra, Portugal, Fevereiro, 2013.

André Costa Lima, João Canas Ferreira,
Automatic Generation of Cellular Automata on FPGA, REC 2013 - X Jornadas sobre Sistemas Reconfiguráveis, Coimbra, Portugal, Fevereiro, 2013.

Paulo Ferreira, João Canas Ferreira, José Carlos Alves,
Computational Block Templates Using Functional Programming Models, REC 2013 - X Jornadas sobre Sistemas Reconfiguráveis, Coimbra, Portugal, Fevereiro, 2013.

José Carlos Sá, João Canas Ferreira, José Carlos Alves,
FPGA Implementation of Autonomous Navigation Algorithm with Dynamic Adaptation of Quality of Service, REC 2013 - X Jornadas sobre Sistemas Reconfiguráveis, Coimbra, Portugal, Fevereiro, 2013.

Pedro Vieira Santos, José Carlos Alves, João Canas Ferreira,
A FRAMEWORK FOR HARDWARE CELLULAR GENETIC ALGORITHMS: AN APPLICATION TO SPECTRUM ALLOCATION IN COGNITIVE RADIO, FPL 2013 - International Conference on Field Programmable Logic and Applications, Porto, Portugal, Setembro, 2013.

Pedro Vieira Santos, José Carlos Alves, João Canas Ferreira, High-Level Synthesis of Custom Processing Elements for Genetic Algorithms, DCIS 2013 - Conference on Design of Circuits and Integrated Systems, San Sebastian, Spain, Novembro, 2013.

João Bispo, Nuno Paulino, João M.P. Cardoso, João Canas Ferreira, From Instruction Traces to Specialized Reconfigurable Arrays, ReConFig'11 - 2011 International Conference on ReConFigurable Computing and FPGAs, Cancun, Mexico, Novembro, 2011.

Fardin Derogarian Miyandoab, João Canas Ferreira, Vítor Grade Tavares,
A Routing Protocol for WSN Based on the Implementation of Source Routing for Minimum Cost Forwarding Method, SENSORCOMM 2011 - The Fifth International Conference on Sensor Technologies and Applications, Nice, France, Agosto, 2011.

Pedro M. Santos, João Canas Ferreira,
FPGA-based Real-Time Disparity Computation and Object Location, NORCHIP 2010 - 28th Norchip Conference, Tampere, Finland, Novembro, 2010.

Miguel Silva, João Canas Ferreira,
Run-time Generation of Partial FPGA Configurations for Subword Operations, DCIS 2010 - Design of Circuits and Integrated Systems, Lanzarote, Spain, Novembro, 2010.

Carlos Resende, João Canas Ferreira,
Using FPGAs for Real-Time Disparity Map Calculation, DCIS 2010 - Design of Circuits and Integrated Systems, Lanzarote, Spain, Novembro, 2010.

João Rodrigues, João Canas Ferreira,
FPGA-Based Rectification of Stereo Images, DASIP 2010 - Design and Architectures for Signal and Image Processing, Edinburgh, Scotland, Outubro, 2010.

Miguel L. Silva, João Canas Ferreira,
Creation of Partial FPGA Configurations at Run-Time, DSD 2010 - The 13th Euromicro Conference on Digital System Design, Lille, France, Setembro, 2010.

Paulo Ferreira, João Canas Ferreira, José Carlos Alves,
Erlang Inspired Hardware, FPL 2010 - 20th International Conference on Field Programmable Logic and Applications, Milano, Italy, Agosto, 2010.

Miguel L. Silva, João Canas Ferreira,
Run-time Generation of Partial Configurations for Arithmetic Expressions, MWSCAS 2010 - 53rd IEEE International Midwest Symposium on Circuits and Systems, Seattle, USA, Agosto, 2010.

Miguel L. Silva, João Canas Ferreira,
Algorithms for run-time placement and routing on Virtex II Pro FPGAs, REC'2010 - VI Jornadas sobre Sistemas Reconfiguráveis, Aveiro, Portugal, Fevereiro, 2010.

Carlos Resende, João Canas Ferreira,
Real-Time Stereo Matching on FPGA, REC'2010 - VI Jornadas sobre Sistemas Reconfiguráveis, Aveiro, Portugal, Fevereiro, 2010.

Luís Manuel Reis, Maria João Cardoso, João Canas Ferreira,
The Performance Impact when Optimizing Mapping Algorithms for an FPGA-based Mobile Robot, REC'2010 - VI Jornadas sobre Sistemas Reconfiguráveis, Aveiro, Portugal, Fevereiro, 2010.

Pedro Alves, João Canas Ferreira,
Non-Rectangular Reconfigurable Cores for Systems-on-Chip, SPIE Europe MNM 2009 - SPIE Conference Microtechnologies for the New Millenium, Dresden, Germany, Maio, 2009.

Pedro Alves, João Canas Ferreira,
Generation of Non-Rectangular Reconfigurable Cores for System-on-Chip, REC'2009 - V Jornadas sobre Sistemas Reconfiguráveis, Monte de Caparica, Portugal, Fevereiro, 2009.

Miguel L. Silva, João Canas Ferreira,
Run-Time Generation of Configurations for Dynamically Reconfigurable, REC'2009 - V Jornadas sobre Sistemas Reconfiguráveis, Monte de Caparica, Portugal, Fevereiro, 2009.

Eurico Damásio, João Canas Ferreira,
Suporte para Reconfiguração Dinâmica Parcial em Linux, REC'2009 - V Jornadas sobre Sistemas Reconfiguráveis, Monte de Caparica, Portugal, Fevereiro, 2009.

Miguel L. Silva, João Canas Ferreira,
Flexible use of IP Cores on Dynamically ReconīŦgurable Systems, DCIS 2008 - Conference on Design of Circuits and Integrated Systems, Grenoble, França, Novembro, 2008.

Miguel L. Silva, João Canas Ferreira,
Generation of partial FPGA configurations at run-time, FPL 2008 - The International Conference on Field Programmable Logic and Applications , pp.367-372, Heidelberg, Germany, Setembro, 2008.

Paulo Ferreira, João Canas Ferreira, José Carlos Alves,
Arquitecturas Paralelas Heterogéneas em Sistemas Reconfiguráveis, REC 2008 - IV Jornadas Sobre Sistemas Reconfiguráveis, Braga, Portugal, Fevereiro, 2008.

Miguel L. Silva, João Canas Ferreira,
Exploiting the Run-Time Use of IP Cores on Dynamically Reconfigurable Systems , REC 2008 - IV Jornadas Sobre Sistemas Reconfiguráveis, Braga, Portugal, Fevereiro, 2008.

Miguel L. Silva, João Canas Ferreira,
Exploiting dynamic reconfiguration of platform FPGAs: Implementation issues, RAW 2006 - 13th Reconfigurable Architectures Workshop, Rodes, Greece, Abril, 2006.

Miguel L. Silva, João Canas Ferreira,
A Comparison of Two Dynamically Reconfigurable System Implementations on Platform FPGA, REC 2006 - II Jornadas sobre Sistemas Reconfiguráveis, Porto, Portugal, Fevereiro, 2006.

2005 and Before



João Canas Ferreira, José Machado da Silva, Generation of Hardware Modules for Run-Time Reconfigurable Hybrid CPU/FPGA Systems, DCIS'05 - Design of Circuits and Integrated Systems, Lisboa, Portugal, Novembro, 2005.

João Canas Ferreira, José Machado da Silva,
Using a ightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs, DSD'2005 - 8th EUROMICRO Conference on Digital System Design, Porto, Portugal, Setembro, 2005.

João Canas Ferreira, José Machado da Silva,
Run-Time Reconfiguration Support for FPGAs with Embedded CPUs: The Hardware Layer, IPDPS'05 - 19th IEEE International Parallel and Distributed Processing Symposium, Denver, USA, Abril, 2005.

João Canas Ferreira, José Machado da Silva,
Development of Applications with Run-Time Support for Dynamic Reconfiguration, REC 2005 - Jornadas sobre Sistemas Reconfiguráveis, Faro, Portugal, Fevereiro, 2005.

João Canas Ferreira, José da Silva Matos,
A Development Support System for Applications that Use Dynamically Reconfigurable Hardware, FPL 2004 - Field-Programmable Logic and Applications, Antwerp, Bélgica, 2004.

José Carlos Alves, Carlos Albuquerque, João Canas Ferreira, José da Silva Matos,
Parallelizing 2D packing problems with a reconfigurable computing subsystem, Proceedings of VECPAR2000 - International Meeting in Vector and Parallel Processing, Porto, POrtugal, Junho, 2000.

José Carlos Alves, João Canas Ferreira, José Fernando da Costa Oliveira, José António Soeiro Ferreira, José da Silva Matos,
FAFNER - Accelerating Nesting Problems with FPGAs, FCCM'99 - 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, California, EUA, Abril, 1999.

António Miguel da Fonseca Fernandes Gomes, José Fernando da Costa Oliveira, João Canas Ferreira, José António Soeiro Ferreira,
Posicionamento de Figuras Irregulares: Optimização com hardware dedicado., IO'98 - IO'98 - 8º Congresso da APDIO - "Investigação Operacional: a ciência aplicada para melhores decisões", Faro, Portugal, Dezembro, 1998.

João Canas Ferreira, José Carlos Alves, Carlos Albuquerque, José Fernando da Costa Oliveira, José António Soeiro Ferreira,
A Flexible Custom Computing Machine for Nesting Problems, DCIS'98 - XIII Design of Circuit and Integrated Systems Conference, Madrid, Spain, Novembro, 1998.

João Canas Ferreira, José da Silva Matos,
Application Development for Dynamically Reconfigurable Co-processors, DCIS'98 - XIII Design of Circuit and Integrated Systems Conference, Madrid, Spain, Novembro, 1998.

João Canas Ferreira, José Carlos Alves, José Fernando da Costa Oliveira, José António Soeiro Ferreira, et al.,
Flexible Hardware Acceleration for Nesting Problems, Proceedings of ICECS'98 - 5th IEEE International Conference on Electronics, Circuits and Systems , in Proceedings, Lisboa, Portugal, Setembro, 1998.

João Canas Ferreira, José da Silva Matos,
Mixed-Hardware/Software Applications on Dynamically Reconfigurable Hardware, Proceedings of ICECS'98 - 5th IEEE International Conference on Electronics, Circuits and Systems , Lisboa, Portugal, Setembro, 1998.

António Miguel da Fonseca Fernandes Gomes, José Fernando da Costa Oliveira, João Canas Ferreira, José António Soeiro Ferreira,
Nesting Irregular Shapes: optimizaton with dedicated hardware, EURO XVI - EURO XVI - 16th European Conference on Operational research, Brussels, Belgium, Julho, 1998.

João Canas Ferreira, José da Silva Matos,
A Prototype System for Rapid Application Development Using Dynamically Reconfigurable Hardware, Proceedings of FCCM '98 - 6th IEEE Symposium on Field-Programmable Custom Computing Machines, Nappa Valley, California, EUA, Abril, 1998.

João Canas Ferreira, Ana C. Leão, José Machado da Silva, José da Silva Matos,
High-Level Test Specification and Planning for Mixed-Signal Boards with Boundary-Scan, proceedings of DCIS'97 - XII Design of Circuits and Integrated Systems Conference , pp.33-38, Sevilha, Espanha, Novembro, 1997.